Daniel Nenni

As mentioned in previous blogs, TSMC is my bellwether for the coming economic recovery. Semiconductors are where electronics begin and the sales growth of electronic devices is where the recovery begins. Reporting for the second quarter, TSMC beat upwardly revised expectations with revenue of NT$74.21 billion. More importantly forecasted third quarter revenues are 88 billion to 90 billion in New Taiwan dollars, so we are close to 07 and 08 quarter over quarter revenue levels. If TSMC surpasses estimates again in Q3 we will have a perfect recovery V!

Interesting side note, advanced process technologies (0.13-micron and below) accounted for 65% of wafer revenues. 90-nanometer process technology accounted for 23% of wafer revenues, 65-nanometer 28%, and 45/40-nanometer, with wafer shipments tripling those of Q1, exceeding 1% of total wafer sales.

TSMC’s silicon success is not just based on technological innovation alone, TSMC is also a tremendous marketing innovator, with the most recent example being the Design Automation Conference in San Francisco. In my very first blog entry, Mathmatics of Design Automation, I described the concept of villages, a much more efficient and cooperative way of supporting the value proposition of an EDA exhibit floor. TSMC did just that with their Open Innovation Forum which included an impressive semiconductor design enablement ecosystem:

Cadence demonstrated SiP (System-in-Package), SNA (Substrate Noise Analysis), integrated model-based DFM, and an RF design kit. I believe this is the new Cadence analog / mixed signal direction, which I absolutely agree with.

Integrand Software demonstrated software for high frequency RF and mixed signal design. Sorry, never heard of them.

Lorentz Solutions demonstrated PeakView which gives designers the ability to use a complete electromagnetic (EM) design and verification flow in their RF analog/mixed signal design environment (Cadence Virtuoso). I know some of Lorentz’s customers, great technology, smart people, definitely a company worth investigating.

Magma demonstrated a “Going Concern” notice from its independent auditor, supporting the position that Magma is no longer relevant to EDA.

Mentor Graphics showed IC implementation, which of course is anchored by the Calibre DRC franchise, physical design makes me tingle.

Mosys probably showed something but I have a Virage Logic bias so I skipped it.

SpringSoft showed the Laker layout tool. I’m a big Los Angeles Lakers fan, I’m just saying.

Synopsys showed stuff, but a Synopsys corporate blogger beat me in the Denali EDA Blogger contest so I’m not telling. Next year I’m forgoing the standard blog headshot and using a glamour photo of my wife.

Tela Innovations showed some cool stuff, which, in my shallow understanding, will change modern semiconductor design. In Daniel terms, instead of building houses out of rocks, Tela supplies bricks for reduced cost and increased quality of results. The Tela guys are from Artisan Components so who better to sell the shortcomings of standard cell technology.

Virage Logic showed off customer silicon at 40nm and a first tape-out at 32/28nm. In the IP world, if it’s not silicon proven, it doesn’t belong in your face. Very nice pens too!

Wipro was there, they are a global services provider with 100,000+ employees and $5B+ in revenue, all in a 10’x5’ booth.

Global Unichip is one the biggest semiconductor design services companies ($300M), a fierce competitor in the fabless ASIC business, and favored offspring of TSMC.

This DAC was the best ever for me. The beautiful woman I was dancing with at the Denali party is my wife Shushana, a testimonial to my superior closing skills. We stayed at the Sir Francis Drake Hotel and had an excellent time. For those of you who suggested I hired an escort, my wife says “Uh, thank you, I think”.